Linearity of World-Level Circuit Models: New Understanding

The Word-level Decision Diagram (WDD) technique has not been much investigated upon condition of linearity. We study the boundary case of the WDD, Linear WDD (LDD) and show that an arbitrary l-level combinational network can be represented by l LDDs planar by their nature. We contribute to the understanding of WDD models that so far have been shown to be linear just for some arithmetic circuits. We prove that WDD models upon the condition of the linearity, LDDs, lost the ability to optimize the initial circuit but benefit in applications where compact representation is required. The results of an extensive experimental study (on memory requirements, run time to design LDD models, verification and mapping into FPGA) are reported here.